✨ About The Role
- The role involves designing wireline high-speed analog mixed-signal circuitry for data center connectivity applications.
- Experience in designing low jitter, low power PLL, VCO, and clocking circuitry is required.
- The candidate will need to have a deep understanding of advanced clock distribution techniques.
- Proficiency in electromagnetic tools like EMX or similar is necessary for this position.
- The job requires assessing design bugs and recommending fixes or workarounds to meet technical requirements.
âš¡ Requirements
- The ideal candidate will have a Master's or PhD in Electrical Engineering or Computer Engineering.
- A minimum of 7-10 years of experience in CMOS high-speed analog and mixed-signal development is essential.
- Strong analytical thinking and problem-solving skills are crucial for success in this role.
- The candidate should be organized, self-motivated, and able to work effectively across teams.
- Excellent written and verbal communication skills are necessary to interact with various technical and management levels.